Department of Fundamental Education in Science and Technologyhttps://www.univ-soukahras.dz/en/dept/st |
Module: Logique combinatoire et séquentielle
Lecturer | |
Information |
Bachelor - Second Year : Electronic
Department of Fundamental Education in Science and Technology Website : https://www.univ-soukahras.dz/en/module/5040 Semester : S4 Unit : UEF 2.2.1 Credit : 4 Coefficient: 2 |
Content | Chapter 1: Boolean Algebra and Simplification of Logic Functions (2 weeks) Variables and logic functions (OR, AND, NOR, NAND, XOR) Laws of Boolean algebra De Morgan\\\\\\\'s theorem Complete and incomplete logic functions Representation of logic functions: truth tables, Karnaugh maps Simplification of logic functions: algebraic method, Karnaugh map method Chapter 2: Number Systems and Information Coding (2 weeks) Representation of numbers using codes (binary, hexadecimal, BCD, signed and unsigned binary) Base conversion Unweighted codes (Gray code, error-detecting and error-correcting codes, ASCII code) Arithmetic operations in binary code Chapter 3: Combinational Circuits - Decoders (2 weeks) Definitions Priority encoders Transcoders Cascading of circuits Applications Analysis of a decoder integrated circuit datasheet List of decoder integrated circuits Chapter 4: Combinational Circuits - Multiplexers (2 weeks) Definitions Demultiplexers Cascading of circuits Applications Analysis of a multiplexer integrated circuit datasheet List of multiplexer integrated circuits Chapter 5: Combinational Circuits - Comparators (2 weeks) Definitions 1-bit, 2-bit, and 4-bit comparators Cascading of circuits Applications Analysis of a comparator integrated circuit datasheet List of comparator integrated circuits Chapter 6: Flip-Flops (2 weeks) Introduction to sequential circuits RS flip-flop RST flip-flop D flip-flop Master-slave flip-flop T flip-flop Examples of applications using flip-flops: frequency dividers, pulse generators Truth tables, timing diagrams, limitations, and imperfections for each flip-flop Chapter 7: Counters (2 weeks) Definition Classification of counters (synchronous, regular, irregular, asynchronous, full-cycle and incomplete-cycle counters) Design of synchronous binary counters (full and incomplete) Excitation tables for JK, D, and RS flip-flops Design of asynchronous binary modulo (n) counters: full, incomplete, regular, and irregular Programmable counters (starting from any state) Chapter 8: Registers (1 week) Introduction Classic registers Shift registers Loading and retrieval of data in registers (PIPO, PISO, SIPO, SISO) Data shifting in registers Universal register (74LS194A) Available integrated circuits Applications: classic registers, specific counters, queues. |
Evaluation | Continu : 40 % Examen : 60 % |